Samsung presented the world's first HBM5 memory standard at the Computex Taipei 2026 international computer exhibition. This eighth-generation storage technology is designed to meet future needs in high-performance computing and AI model training. This is reported by Ixbt.com .
The HBM5 memory is expected to hit the market between 2029 and 2031. The manufacturing process will utilize cutting-edge technologies: it is expected to be based on a combination of a 2nm base die and 1nm DRAM chips, which will significantly increase the device's energy efficiency.
Regarding heat dissipation, Samsung is applying a completely new approach. To solve the problem of extremely high power consumption in the HBM5 standard, immersion cooling technology will be used. In this method, the die and the entire package are directly submerged in a special cooling liquid.
In terms of performance, the HBM5 standard is expected to transition to a 4096-bit I/O interface, which is double that of HBM4. A 16-layer (16-Hi) architecture will be chosen as the standard, and the bandwidth per stack is predicted to reach up to 4 TB/s.
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